InTime Software First To Deliver RTL Timing Analysis To The Desktop With New Time Director

CUPERTINO, Calif. — May 27, 2003 — InTime SoftwareTM, Inc. introduced Time DirectorTM, the first-ever product for the electronic design desktop to enable cost-effective rapid timing closure with performance that accelerates existing methods by a factor of 40X to 50X. InTime Software is the emerging leader in RTL Timing Analysis (RTATM) technology for complex IC design.

Time Director is an integral part of RTA, which accurately predicts the RTL-to-GDSII flow at a fraction of the cost and time of traditional implementation flows. Time Director moves static timing analysis to the front of the design process, operating at RTL rather than waiting for gates. Now, with timing tested in this RTL source environment—where Time Director easily enables edits to problem-causing RTL code—expensive iterations are reduced and turnaround time is shortened dramatically.

Time Director captures a designer’s intent up front at the block level with new RTL. It also contains a full-featured debug environment built around RTL timing, RTL schematics, and full hierarchy analysis combined with cross probing. This results in fast closure from quality RTL. Time Director also provides block-level area estimates to help the design team plan for downstream packaging, data flow, and floorplanning issues.

According to Richard Newton, Dean of the College of Engineering, University of California, Berkeley, “Achieving faster timing closure has been a major challenge in the design of SoCs. By moving timing analysis and debug up to the RTL phase of the design flow, architectural tradeoffs can be made more efficiently and cost effectively, and faster timing closure achieved.”

Moving RTA To the Desktop Speeds Timing Closure
Traditional timing closure flows are based on methods that are slow, inaccurate, or expensive since they require the ASIC or SoC to be fully synthesized and placed before accurate timing models are created. In contrast, by leveraging RTL static timing analysis, Time Director delivers results to the designers’ desktop that are 40 to 50 times faster. By leaving the RTL source code unaltered throughout its analysis, Time Director puts control in the hands of logic designers to optimize the code to reach rapid timing closure.

RTA: Accurate Predictor of RTL-to-GDSII Flow
RTA provides accuracy on the physical, timing, and netlist levels. Physical accuracy is ensured through a spectrum of capability that spans a physical parasitic database through placement- and obstruction-based virtual routing with full layout knowledge. Timing accuracy is provided with InTime RTA’s use of the same .lib, LEF, and Apollo input files used by standard implementation flows. Time Director Project WizardTM uses these files to automatically translate vendor libraries and build timing fabrics. This cuts time spent on manual translation and assures timing accuracy. RTA also provides netlist accuracy by using the same flip-flop, latch, and DesignWare inferences as full synthesis.

InTime’s Time Director Slashes ASIC and SoC Development Costs
By using Time Director as their RTL analysis and debug environment earlier in the design cycle, RTL designers can implement problem-free RTL before launching synthesis and physical design tools. The result is higher efficiency and optimization of existing tool resources.

“Most physical timing solutions in the implementation flow cost $400,000 or more. This high cost and longer run-times have prevented these tools from reaching the desks of RTL designers, where the crucial architectural issues need to be addressed,” said George Janac, CTO and founder of InTime Software. “RTA is now required as a critical screening process to verify optimized synthesis and silicon virtual prototyping. With Time Director’s RTL Timing Analysis, InTime has put an affordable desktop solution within reach of every RTL designer.”

Time Director was developed for easy integration with existing synthesis and silicon virtual prototyping flows from Cadence, Synopsys, and Magma. It features interfaces for industry-standard outputs such as Synopsys-compatible constraints, LEF, DEF, and .lib.

Pricing and Availability
Time Director is in customer beta test now, and is slated to ship in August 2003. Time Director is priced at $50,000 U.S. for an annual time-based license. For more information on Time Director and other products from InTime, visit www.intimesw.com.

About InTime Software
InTime SoftwareTM develops EDA solutions that give IC designers powerful design planning control, enabling early timing closure for complex ASIC, SoC, and ASSP designs. InTime’s products provide early insight into timing and area at the RTL level, eliminating downstream problems that are more time consuming and costly to fix. Using industry-standard input and output formats, InTime products improve the design flow into third-party synthesis and physical design systems.

Headquartered in Cupertino, Calif., InTime Software has sales and support offices in Silicon Valley; Austin, Texas; and Boston, Mass. InTime products are distributed in Japan through Innotech Corp.; in Taiwan through Maojet; and in Korea through I&C Technologies. or more information, call 408-565-0111 or visit www.intimesw.com.

Ron Burns
InTime Software
408-565-0342
ron@intimesw.com

Jen Bernier
Armstrong Kendall, Inc.
415-824-1026
jen@akipr.com